Research on the application of artificial intelligence technology in communication scenarios for wafer defect recognition
Lu Bai
Martin Core Semiconductor(Zhejiang)Co., Ltd.
Chenqi Ding
Martin Core Semiconductor(Zhejiang)Co., Ltd.
DOI: https://doi.org/10.59429/pmcs.v7i2.10318
Keywords: Artificial intelligence; Wafer defect recognition; Convolutional neural networks; Deep learning; Communication technology
Abstract
With the semiconductor industry’s increasing wafer quality requirements the limitations of traditional defect detection in efficiency and accuracy are prominent.This paper systematically studies AI-communication technology integration in wafer defect recognition focusing on key breakthroughs like image acquisition-5G transmission coordination edge computing-deep learning lightweight deployment and multi-device spatiotemporal synchronous detection.A CNN-based edge computing architecture combined with 5G slicing and multi-scale feature fusion significantly improves defect recognition real-time performance and accuracy.Experiments show 92% detection accuracy 28% traditional detection time and <0.9% false detection rate with IIoT-enabled real-time defect-data-process-parameter correlation analysis.Practical applications verify AI-communication integration’s efficiency in large-scale production providing full-process optimization for semiconductor intelligent manufacturing.
References
[1]Ma Lei, Zhu Boyang, Hu Weiguo, et al.Product research on “5G” edge computing cloud platform and its application in industrial vision AI design[Z].Zhejiang Jiuzhou Cloud Information Technology Co., Ltd.2023.
[2]Liu, M..Research on multi-scale defect detection technology of wafer surface based on Gabor and regional convolutional neural network[D].Zhejiang University, 2018.
[3]Fu Chunhe, Gao Rongrong, Wang Junshuai, et al.Research on chip surface defect detection based on artificial intelligence[J].Specialized Equipment for Electronic Industry, 2019, 48(1):4.DOI:CNKI:SUN:DGZS.0.2019-01-010.
[4]LIN Jia, WANG Hai-Ming, YU Nai-Gong, et al.Research on online detection of wafer surface defects[J].Computerized Measurement and Control, 2018, 26(5):4.DOI:CNKI:SUN:JZCK.0.2018-05-004.
[5]Xiaoni Zhang.Research on edge detection method of equipment image based on mathematical morphology[J].Automation and Instrumentation, 2023(12):81-84.
[6]Kim, Jinho, Lee, et al.Detection and clustering of mixed-type defect patterns in wafer bin maps[J].Iise Transactions, 2018.
[7]Li, Chen, Ren, Qi.Research on defect detection technology of wafer chips based on Halcon[J].Electromechanical Engineering Technology, 2024, 53(11):224-227.
[8]Jin C H , Na H J , Piao M , et al.A Novel DBSCAN-based Defect Pattern Detection and Classification Framework for Wafer Bin Map[J].IEEE Transactions on Semiconductor Manufacturing, 2019, PP(99):1-1.DOI:10.1109/TSM.2019.2916835.
[9]Industrial Internet Industry Alliance.Network technical requirements for intelligent detection system[S].Beijing:Ministry of Industry and Information Technology, 2023.